Question:medium

In the digital circuit shown in the figure, for the given inputs the P and Q values are:

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When analyzing logic circuits, work step by step through each gate (AND, OR, NOT) to determine the final outputs.
Updated On: Jan 14, 2026
  • \( P = 1, Q = 1 \)
  • \( P = 0, Q = 0 \)
  • \( P = 0, Q = 1 \)
  • \( P = 1, Q = 0 \)
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The Correct Option is B

Solution and Explanation

Given a digital logic circuit with both inputs set to logic 1 (HIGH), determine the outputs \( P \) and \( Q \).

Concept Used:

Standard Boolean operations for logic gates:

  • AND gate: Output is 1 if and only if all inputs are 1.
  • NAND gate: Output is the inverse of an AND gate; output is 0 if and only if all inputs are 1.
  • OR gate: Output is 1 if at least one input is 1.
  • NOT gate (inverter): Output is the logical complement of the input.
  • NOR gate: Output is the inverse of an OR gate.

Step-by-Step Analysis:

Step 1: Input identification.

Both the upper and lower inputs are designated as logic 1 (HIGH).

Step 2: Top-left gate analysis.

This is a NAND gate. With inputs 1 and 1, the AND operation yields 1. Therefore, the NAND output is NOT(1) = 0. \[ \text{Output of NAND gate} = 0 \]

Step 3: Bifurcation of NAND gate output.

The output of this NAND gate (0) serves as an input to the lower-left OR gate and one input to the rightmost AND gate (which determines P).

Step 4: Bottom-left gate analysis.

The OR gate has two inputs: the direct lower input (1) and the output from the NAND gate (0). The OR operation with inputs 1 and 0 results in an output of 1. So, OR output = 1.

Step 5: Inverter analysis.

The output of the OR gate (1) passes through a NOT gate. The output of the NOT gate is NOT(1) = 0.

Step 6: Second-to-last gate analysis (determines Q).

This NOR gate receives the output from the NOT gate (0) and the direct upper input (1). The OR operation with inputs 1 and 0 yields 1. Therefore, the NOR output is NOT(1) = 0. \[ Q = 0 \]

Step 7: Final output analysis (determines P).

The rightmost AND gate receives two inputs: the output of the first NAND gate (0) and the top input (1). The AND operation with inputs 1 and 0 yields 0. \[ P = 0 \]

Final Computation & Result

\[ P = 0,\quad Q = 0 \]

Correct Option: (2) \( P = 0, Q = 0 \)

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