1. Logic Expressions for Half Adder: For two inputs $A$ and $B$:
• Sum ($S$) = $A \oplus B = A\bar{B} + \bar{A}B$
• Carry ($C$) = $A \cdot B$
2. Implementing with NAND Gates: Since NAND is a universal gate, any logic function can be built using it. To implement a half adder efficiently:
• The first NAND gate takes $A$ and $B$ to produce $\overline{AB}$.
• This output $\overline{AB}$ is fed into two separate NAND gates along with the original $A$ and $B$ respectively.
• The outputs of these two gates are fed into a fourth NAND gate to produce the Sum ($A \oplus B$).
• The output of the first NAND gate ($\overline{AB}$) is fed into a fifth NAND gate (configured as an inverter) to produce the Carry ($AB$).
3. Summary: It takes exactly
5 NAND gates to produce both the Sum and Carry outputs of a half adder. If only the Sum (XOR) was required, it would take 4 NAND gates.