Question:medium

The output Y of following circuit for given inputs is :
ABY Circuit

Updated On: Jan 13, 2026
  • \(A \cdot B (A + B)\)
  • \(A \cdot B\)
  • 0
  • \(\overline{A} \cdot B\)
Show Solution

The Correct Option is C

Solution and Explanation

The provided image depicts a logic circuit composed of AND, OR, and NOT gates. This section details its step-by-step analysis.

Circuit Breakdown:

  1. Input A is routed to an OR gate and an AND gate.
  2. Input B is inverted by a NOT gate, yielding an output of \( \overline{B} \).
  3. The OR gate processes inputs A and B, producing \( A + B \).
  4. The AND gate combines input A with the inverted B (\( \overline{B} \)), resulting in \( A \cdot \overline{B} \).
  5. The outputs from the OR and AND gates are fed into a final AND gate.

The final output Y of this AND gate is:

\( Y = (A + B) \cdot (A \cdot \overline{B}) \)

Analysis of the expression:

  1. The term \( A \cdot \overline{B} \) signifies that A must be true and B must be false.
  2. The expression \( (A + B) \) is true if either A or B is true.
  3. Combining \( (A + B) \) and \( (A \cdot \overline{B}) \) via an AND operation implies:
    • For \( (A \cdot \overline{B}) \) to be true, A must be true and B false. In this scenario, \( (A + B) \) is also true (as A is true).
    • If B is true, \( (A \cdot \overline{B}) \) becomes false, rendering the entire expression false.

Consequently, the output Y will invariably be 0, as the conditions for a true output are not consistently met.

Conclusion: The correct answer is \( 0 \).

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