Question:medium

Figure
The output of the given circuit diagram is

Updated On: Mar 19, 2026
  • \[\begin{array}{|c|c|c|} \hline A & B & Y \\ \hline 0 & 0 & 0 \\ 1 & 0 & 0 \\ 0 & 1 & 0 \\ 1 & 1 & 1 \\ \hline \end{array}\]
  • \[\begin{array}{|c|c|c|} \hline A & B & Y \\ \hline 0 & 0 & 0 \\ 1 & 0 & 1 \\ 0 & 1 & 1 \\ 1 & 1 & 0 \\ \hline \end{array}\]
  • \[\begin{array}{|c|c|c|} \hline A & B & Y \\ \hline 0 & 0 & 0 \\ 1 & 0 & 1 \\ 0 & 1 & 0 \\ 1 & 1 & 0 \\ \hline \end{array}\]
  • \[\begin{array}{|c|c|c|} \hline A & B & Y \\ \hline 0 & 0 & 0 \\ 1 & 0 & 0 \\ 0 & 1 & 1 \\ 1 & 1 & 0 \\ \hline \end{array}\]
Show Solution

The Correct Option is C

Solution and Explanation

The provided circuit diagram depicts a logic gate combination circuit. An analysis of this circuit, step-by-step, will ascertain the output \( Y \) for all possible input combinations of \( A \) and \( B \).

The circuit comprises:

  • A NOT gate, which inverts the input signal \( B \).
  • Two AND gates and one OR gate, responsible for signal processing.

The output for each input combination is calculated in the subsequent truth table:

  1. Inputs: \( A = 0 \), \( B = 0 \)
    • The NOT gate transforms \( B = 0 \) to 1.
    • The first AND gate receives \( A = 0 \) and NOT \( B = 1 \), yielding \( 0 \cdot 1 = 0 \).
    • The second AND gate receives \( B = 0 \) (inverted to 1) and \( A = 0 \), yielding 0.
    • The OR gate combines the outputs 0 and 0, resulting in \( Y = 0 \).
  2. Inputs: \( A = 1 \), \( B = 0 \)
    • The NOT gate transforms \( B = 0 \) to 1.
    • The first AND gate receives \( A = 1 \) and NOT \( B = 1 \), yielding \( 1 \cdot 1 = 1 \).
    • The second AND gate receives \( B = 0 \) (inverted to 1) and \( A = 1 \), yielding 0.
    • The OR gate combines the outputs 1 and 0, resulting in \( Y = 1 \).
  3. Inputs: \( A = 0 \), \( B = 1 \)
    • The NOT gate transforms \( B = 1 \) to 0.
    • The first AND gate receives \( A = 0 \) and NOT \( B = 0 \), yielding 0.
    • The second AND gate receives \( B = 1 \) (inverted to 0) and \( A = 0 \), yielding \( 0 \cdot 0 = 0 \).
    • The OR gate combines the outputs 0 and 0, resulting in \( Y = 0 \).
  4. Inputs: \( A = 1 \), \( B = 1 \)
    • The NOT gate transforms \( B = 1 \) to 0.
    • The first AND gate receives \( A = 1 \) and NOT \( B = 0 \), yielding 0.
    • The second AND gate receives \( B = 1 \) (inverted to 0) and \( A = 1 \), yielding \( 1 \cdot 0 = 0 \).
    • The OR gate combines the outputs 0 and 0, resulting in \( Y = 0 \).

The analysis leads to the following truth table:

ABY
000
101
010
110

Consequently, the definitive answer is:

\[\begin{array}{|c|c|c|} \hline A & B & Y \\ \hline 0 & 0 & 0 \\ 1 & 0 & 1 \\ 0 & 1 & 0 \\ 1 & 1 & 0 \\ \hline \end{array}\]
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