Step 1: Try a tiny case first.
Think about a $1$-bit flash ADC. It only needs to decide between two codes, $0$ and $1$, so a single comparator, checking whether the input is above or below the midpoint, is enough. That is $2^1-1=1$ comparator.
Step 2: Try a slightly bigger case.
For a $2$-bit flash ADC there are $4$ possible output codes: $00, 01, 10, 11$. To tell these four levels apart we need to check the input against $3$ reference thresholds, below the first, between first and second, between second and third, and above the third, which needs $3$ comparators. That matches $2^2-1=3$.
Step 3: Spot the pattern.
In both small cases, the number of comparators is one less than the number of output codes, because comparators only sit at the boundaries between codes, and a line of $k$ codes has $k-1$ internal boundaries.
Step 4: Apply this pattern to 6 bits.
A $6$-bit converter has $2^6$ possible codes, that is $64$ codes. Following the same boundary logic, the number of comparators needed is one less than this:
\[ 2^6-1 = 64-1 = 63 \]
Step 5: State the result.
\[ \boxed{63} \]