This method rebuilds the SQNR formula from the underlying signal and noise powers instead of quoting the $6.02N + 1.76$ result directly, so the origin of the number is clear.
Quantization step size: For an $N$-bit converter covering a full-scale range $V_{FS}$, the step size is $q = V_{FS}/2^N$.
Quantization noise power: The rounding error is spread uniformly between $-q/2$ and $+q/2$, so its mean square value (the noise power) is $q^2/12$.
Signal power: The largest sine wave that fits inside the converter's range without clipping has amplitude $V_{FS}/2$, so its RMS value is $V_{FS}/(2\sqrt{2})$ and its power is $V_{FS}^2/8$.
Ratio and conversion to dB: $$\text{SQNR} = \frac{V_{FS}^2/8}{q^2/12} = \frac{12}{8}\left(\frac{V_{FS}}{q}\right)^2 = 1.5 \times (2^N)^2 = 1.5 \times 2^{2N}$$ Taking $10\log_{10}$ of both sides, $$\text{SQNR}_{dB} = 10\log_{10}(1.5) + 20N\log_{10}(2) = 1.76 + 6.02N$$
Every extra bit roughly doubles the number of quantization levels, which multiplies the SQNR by about $4$ (adds about $6.02$ dB).
The fixed $1.76$ dB offset comes from the ratio of a full-scale sine wave's power to a uniform quantizer's step size, and should not be dropped.
Options (A) to (C) correspond to using fewer effective bits or skipping the $1.76$ dB term, both of which underestimate the true SQNR of a full 16-bit converter.
So the maximum SQNR of the 16-bit ADC is about 98 dB, option (D).
