An AND gate, an OR and a NAND gate are connected as shown in the figure. If the inputs are \(A=0\), \(B=1\) and \(C=0\), then the outputs \(y_{1}\), \(y_{2}\), \(y_{3}\) are respectively
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For logic-gate questions, always evaluate gates from left to right. Compute intermediate outputs first and then use them as inputs for the final gate.