Question:medium
Which one of the following statements is FALSE?
Which one of the following statements is FALSE?
Show Hint
Inverted page tables and hashing can introduce non-uniform memory access times, especially when collisions occur in hashed page tables.
Updated On: Jan 30, 2026
- The TLB performs an associative search in parallel on all its valid entries using page number of incoming virtual address.
- If the virtual address of a word given by CPU has a TLB hit, but the subsequent search for the word results in a cache miss, then the word will always be present in the main memory.
- The memory access time using a given inverted page table is always the same for all incoming virtual addresses.
- In a system that uses hashed page tables, if two distinct virtual addresses V1 and V2 map to the same value while hashing, then the memory access time of these addresses will not be the same.
Show Solution
The Correct Option is C
Solution and Explanation
- Option (A):
The Translation Lookaside Buffer (TLB) is an associative memory that allows parallel comparison of virtual page numbers against all valid entries. This enables fast virtual-to-physical address translation. Hence, this statement is true.
- Option (B): A TLB hit indicates that the virtual-to-physical address translation is successful. If a cache miss occurs afterward, the required data block is fetched from main memory using the physical address obtained from the TLB. Therefore, the word will indeed be present in main memory. This statement is true.
- Option (C): Inverted page tables store one entry per physical frame and require a search (often using hashing) to locate the corresponding virtual page. Due to possible hash collisions and variable-length search chains, the lookup time is not guaranteed to be constant for all virtual addresses. Hence, the claim that access time is always the same is false.
- Option (D): In hashed page tables, different virtual addresses may map to the same hash index. When collisions occur, additional steps such as traversing linked lists are needed, which can lead to different memory access times for different addresses. This statement is true.
Final Answer: (C)
- Option (B): A TLB hit indicates that the virtual-to-physical address translation is successful. If a cache miss occurs afterward, the required data block is fetched from main memory using the physical address obtained from the TLB. Therefore, the word will indeed be present in main memory. This statement is true.
- Option (C): Inverted page tables store one entry per physical frame and require a search (often using hashing) to locate the corresponding virtual page. Due to possible hash collisions and variable-length search chains, the lookup time is not guaranteed to be constant for all virtual addresses. Hence, the claim that access time is always the same is false.
- Option (D): In hashed page tables, different virtual addresses may map to the same hash index. When collisions occur, additional steps such as traversing linked lists are needed, which can lead to different memory access times for different addresses. This statement is true.
Final Answer: (C)
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