Step 1: The choice of memory for a large main store comes down to cost and density per bit.
Step 2: SRAM builds each bit from a six-transistor flip-flop, which is bulky. DRAM builds each bit from just one transistor plus a capacitor, so its cells are tiny.
Step 3: Fewer transistors per bit means DRAM packs far more capacity onto a chip at lower cost, which is exactly why it is used for the bulk of main memory.
Step 4: The other claims fail: DRAM is slower than SRAM, it needs periodic refresh so it is not clearly lower power, and it is volatile just like SRAM. Only the fewer-transistors reason holds.
\[\boxed{\text{DRAM requires fewer transistors per bit than SRAM}}\]