Step 1: Name the players in the cycle.
The fetch-decode-execute cycle uses the Program Counter (PC), Control Unit (CU), Instruction Register (IR), Arithmetic Logic Unit (ALU) and general registers. Keeping each one's job straight settles every statement.
Step 2: Check Statement I (Program Counter).
The PC holds the address of the next instruction; right after a fetch it is incremented so the CPU advances. Statement I is correct.
Step 3: Check Statement II (Control Unit).
The CU is exactly what fetches an instruction from memory and drops it into the Instruction Register. Statement II is correct.
Step 4: Check Statement III (ALU decoding).
Decoding is the Control Unit's job, not the ALU's; the ALU only carries out arithmetic and logic once the instruction is decoded. Statement III is wrong.
Step 5: Check Statement IV (registers as permanent storage).
Registers are tiny, fast, temporary storage inside the CPU. Permanent files live on disks (SSD/HDD), so Statement IV is wrong.
Step 6: Collect the survivors.
Only Statements I and II hold up.
\[ \boxed{\text{I and II}} \]