Question:medium

The inputs to a digital circuit are as shown below. The output Y is

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To verify Boolean logic circuits, you can substitute test values (like \( A=1, B=1, C=1 \)) and trace them through the gates. For these inputs, the NAND gate gives 0, the NOT gate gives 0, and the OR gate outputs 0. Substituting these into the correct option (C) gives \( 0 + 0 + 0 = 0 \), which confirms the expression is correct.
Updated On: May 28, 2026
  • \( A + B + \bar{C} \)
  • \( (A+B)\bar{C} \)
  • \( \bar{A} + \bar{B} + \bar{C} \)
  • \( \bar{A} + \bar{B} + C \)
Show Solution

The Correct Option is C

Solution and Explanation

Step 1: Understanding the Concept:
Digital logic circuits are made of basic gates like AND, OR, NOT, NAND, and NOR.
The output of the circuit is a Boolean expression of the input variables.
We analyze the circuit step-by-step from inputs to output.
De Morgan's Theorems are often useful to simplify the final Boolean expression.
Step 2: Key Formula or Approach:
NAND gate: \(Y = \overline{A \cdot B}\).
NOR gate: \(Y = \overline{A + B}\).
NOT gate: \(Y = \overline{A}\).
De Morgan's Theorem 1: \(\overline{A \cdot B} = \overline{A} + \overline{B}\).
De Morgan's Theorem 2: \(\overline{A + B} = \overline{A} \cdot \overline{B}\).
Step 3: Detailed Explanation:
Looking at the diagram:
1. Inputs \(A\) and \(B\) go into a NAND gate. The output of this gate is \(X = \overline{A \cdot B}\).
2. Input \(C\) goes through a NOT gate. The output is \(Z = \overline{C}\).
3. These two intermediate outputs \(X\) and \(Z\) go into an OR gate.
The final output is \(Y = X + Z\).
Substitute the expressions for \(X\) and \(Z\):
\[ Y = (\overline{A \cdot B}) + \overline{C} \]
Apply De Morgan's Law to the first term \(\overline{A \cdot B}\):
\[ \overline{A \cdot B} = \overline{A} + \overline{B} \]
Substitute this back into the expression for \(Y\):
\[ Y = (\overline{A} + \overline{B}) + \overline{C} \]
\[ Y = \overline{A} + \overline{B} + \overline{C} \]
This matches option (C).
Step 4: Final Answer:
By tracing the logic through the NAND, NOT, and OR gates and applying Boolean identities, the final output is determined to be \(\overline{A} + \overline{B} + \overline{C}\).
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