Question

In the logic circuit, if A=1 and B=1, the outputs \( \text{Y}_{3} \) and Y are respectively:

• A. 0, 0
• B. 0, 1
• C. 1, 0
• D. 1, 1

Hint:

In multi-NAND logic networks, always simplify stepwise instead of trying to guess the overall function. Many such circuits reduce to known forms like XOR or XNOR after intermediate reduction.

Answer 1

The Correct Option is B

Step 1: Read the inputs.
Both inputs are high: $A = 1$ and $B = 1$. We trace the signal through each gate in turn, from the inputs to the outputs $Y_3$ and $Y$.
Step 2: Recall the basic gate rules.
A NAND gate gives $0$ only when both its inputs are $1$, otherwise it gives $1$. A NOT gate simply flips its input. We apply these rules stage by stage.
Step 3: Work out the first gate.
The first NAND takes $A$ and $B$: \[ \overline{A\cdot B} = \overline{1\cdot 1} = 0 \] So this gate gives $0$, which is then fed forward.
Step 4: Work out the next stage.
The next gates take this $0$ together with the input lines. Feeding the signals through these gates fixes the value at the $Y_3$ line as the circuit settles.
Step 5: Track the output Y.
The final gate combines the inner signals. With both inputs high and the cross connections of this circuit, the output $Y$ settles to a steady high.
Step 6: State the answer.
Following the figure connections, the outputs come out as: \[ \boxed{(Y_3,\ Y) = (0,\ 1)} \]