A 32-to-1 multiplexer can be implemented using two 16-to-1 multiplexers. The outputs of the two 16:1 multiplexers are then combined with a two-input OR gate to select one of the 32 inputs. This is a common method in digital logic design for constructing larger multiplexers from smaller ones.
Final Answer: \[ \boxed{\text{(1) two 16:1 Muxs and one two-input OR gate}} \]