List of top Computer Science and IT Engineering Questions on Memory Management and Virtual Memory asked in GATE CS

Consider contiguous allocation of physical memory to processes using variable
partitioning scheme. Suppose there are 8 holes in the memory of sizes 20 KB, 4 KB,
25 KB, 18 KB, 7 KB, 9 KB, 15 KB, and 12 KB. Assume that no two holes are
adjacent. Two processes P1 of size 16 KB and P2 of size 9 KB arrive in that order,
and they are allocated memory using the best-fit technique. After allocating space
to P1 and P2, the number of holes of size less than 8 KB is ____________. (answer
in integer)
Note: \(1\mathrm{K}=2^{10}\)

A system has a Translation Lookaside Buffer (TLB) that has a reach of 1 MB. TLB
reach is defined as the total amount of physical memory that can be accessed
through the TLB entries. The paging system uses pages of size 4 KB. The virtual
address space is 64 GB and physical address space is 1 GB. If each TLB entry stores
a 4-bit process id, page number, frame number, and a 2-bit control field, then the
size of the TLB (in bytes) is ___________. (answer in integer)
Note: \(1\mathrm{K}=2^{10}\), \(1\mathrm{M}=2^{20}\), \(1\mathrm{G}=2^{30}\)

Consider a system that has a cache memory unit and a memory management unit
(MMU). The address input to the cache memory is a physical address. The MMU
has a translation lookaside buffer (TLB). Assume that when a page is evicted from
the main memory, the corresponding blocks in the cache are marked as invalid.
For a given memory reference, which of the following sequences of events can
NEVER happen?