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List of top Analog and Digital Electronics Questions on Combinational Logic Circuits asked in GATE BM

The figure below shows the Karnaugh map (K-map) for a truth table with 4 variables \(A\), \(B\), \(C\) and \(D\). Which one of the following expressions represents the minimum sum of products? Note: The empty cells in the K-map are 0's.

AB / CD00011110
00
01111
11111
101
  • GATE BM - 2026
  • GATE BM
  • Analog and Digital Electronics
  • Combinational Logic Circuits
In the following digital circuit, the delay of both the NAND gates is 4 nanoseconds (ns) and the delay of the NOT gate is 1 ns. If a 10 MHz clock signal with 50% duty cycle is given as the input, the duty cycle of the output is %.
(Answer in integer)
  • GATE BM - 2026
  • GATE BM
  • Analog and Digital Electronics
  • Combinational Logic Circuits
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