List of top Analog and Digital Electronics Questions asked in GATE BM

The \(I-V\) characteristics of a diode with a knee voltage \(V_{knee} = 0.8\) volts is shown in Figure 1.

This diode is used in the circuit shown in Figure 2, in which an input signal of \(V_{in} = 100\sin(1000t)\) volts is applied. What is the voltage \(V_{out}\) (in volts) across the capacitor at steady state?

Assume that the capacitor is initially discharged and the reverse breakdown voltage of the diode is much greater than 100 volts.

If the operational amplifier in the circuit below is ideal, the input impedance looking into terminal \(V_{in}\) is

The figure below shows the Karnaugh map (K-map) for a truth table with 4 variables \(A\), \(B\), \(C\) and \(D\). Which one of the following expressions represents the minimum sum of products? Note: The empty cells in the K-map are 0's.

AB / CD	00	01	11	10
00
01		1	1	1
11	1		1	1
10				1

In the following digital circuit, the delay of both the NAND gates is 4 nanoseconds (ns) and the delay of the NOT gate is 1 ns. If a 10 MHz clock signal with 50% duty cycle is given as the input, the duty cycle of the output is %.
(Answer in integer)

A standard n-type MOSFET, biased in the saturation region, has the following parasitic capacitances:
1. \(C_{GS}\): gate to source capacitance
2. \(C_{GD}\): gate to drain capacitance
3. \(C_{DS}\): drain to source capacitance
Which one of the following options is correct?