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List of top Computer Organization and Architecture Questions on Cache Memory - Direct Mapped and Set Associative Mapping

Consider a system with 1 MB physical memory and a word length of 1 byte. The system uses a direct mapped cache, with block numbers starting from 0. The word with physical address 0xA2C28 is mapped to the cache block number \(176_{10}\). The maximum possible size of the cache (in KB) is ______.

Note: \(1\text{K}=2^{10}\) and \(1\text{M}=2^{20}\)
  • GATE CS - 2026
  • GATE CS
  • Computer Organization and Architecture
  • Cache Memory - Direct Mapped and Set Associative Mapping
The size of the physical address space of a processor is \(2^{32}\) bytes. The capacity of a cache memory unit is \(2^{23}\) bytes. The cache block size is 128 bytes. The cache memory unit can be built as a direct mapped cache or as a \(K\)-way set-associative cache, where \(K = 2^{L}\) and \(L \in \{1,2,3\}\). Let the length of the TAG field be \(M\) bits for the direct mapped cache, and \(N\) bits for the set-associative cache.

Which one of the following options is true?
  • GATE CS - 2026
  • GATE CS
  • Computer Organization and Architecture
  • Cache Memory - Direct Mapped and Set Associative Mapping
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