Understanding the Concept:
A Metal-Oxide-Semiconductor (MOS) capacitor consists of a top metal gate electrode, a thin insulating oxide layer (typically \(\text{SiO}_2\)), and a semiconductor substrate base layer. Unlike a traditional parallel-plate capacitor, the capacitance of an MOS structure is not constant. Instead, it varies non-linearly as a function of the applied gate DC bias voltage (\(V_G\)). This voltage-dependent behavior occurs because changing the gate potential modulates the charge distribution and carrier concentration at the semiconductor-oxide interface through three distinct operational regimes: Accumulation, Depletion, and Inversion.
Step 1: Analyzing the operational states and capacitance curve.
Let's consider a standard MOS capacitor on a p-type substrate:
• Accumulation Region: Applying a negative gate voltage attracts a high concentration of majority holes to the interface. The total capacitance is at its maximum and equals the oxide capacitance (\(C_{\text{ox}}\)).
• Depletion Region: As the gate voltage shifts positive, holes are repelled away from the interface, creating a region of fixed negative acceptor ions. This depletion width acts as a dielectric layer in series with the oxide layer, which causes the total overall capacitance to drop significantly to a minimum value.
• Inversion Region: When the positive gate voltage is increased further past the threshold voltage, it begins attracting minority electrons to the interface, forming an inversion layer. At low operational test frequencies, these mobile electrons can track the voltage variation, causing the measured capacitance to rise back up to its maximum value, \(C_{\text{ox}}\).
Step 2: Evaluating the correct option based on trends.
Looking at the choices provided:
• Option (A) is incorrect because there is a non-zero capacitance present at zero bias, determined by the depletion layer width.
• Option (C) is incorrect because MOS capacitance depends heavily on the applied voltage.
• Option (D) is incorrect because it can accumulate both electrons and holes depending on the substrate type and applied polarity.
• Option (B) correctly describes the behavior where moving from the minimum capacitance depletion zone into the inversion zone by increasing the gate voltage leads to a rise in total capacitance. This matches Option (B).