Step 1: Understanding the Concept:
The difference between a latch and a flip-flop lies in their response to the enable/clock signal.
- Latch: Level-sensitive. Output follows input as long as the enable level is held.
- Flip-flop: Edge-sensitive. Output changes only at the specific instant of a clock edge.
Step 2: Detailed Explanation:
The question describes a device that is "transparent" during the active period of the enable signal.
- In a D-Latch, if $Enable = 1$, then $Q = D$. If $D$ changes while $Enable$ is still $1$, $Q$ also changes. This matches the description "output follows the data input".
- In a D-Flip-flop, the output captures the value of $D$ only at the clock edge and ignores changes in $D$ while the clock is high.
Step 3: Final Answer:
The described block is the D latch.