Question:medium

Let R1 and R2 be two 4-bit registers that store numbers in 2's complement form. For the operation R1 + R2, which one of the following values of R1 and R2 gives an arithmetic overflow?

Show Hint

In 2's complement arithmetic, overflow occurs when the result falls outside the representable range. For an n-bit register, the range is from \(-2^{n-1}\) to \(2^{n-1}-1\).
Updated On: Jan 30, 2026
  • R1 = 1011 and R2 = 1110
  • R1 = 1100 and R2 = 1010
  • R1 = 0011 and R2 = 0100
  • R1 = 1001 and R2 = 1111
Show Solution

The Correct Option is B

Solution and Explanation

In 4-bit 2’s complement arithmetic, the representable range is from: \[ -8 \text{ to } +7 \] Overflow occurs when the result of adding two numbers falls outside this range. A useful rule is: - Overflow occurs when both operands have the same sign and the result has the opposite sign.

Let us examine each case:

Case 1: \(R_1 = 1011,\ R_2 = 1110\)
- \(1011 = -5\), \(1110 = -2\)
- Sum: \(-5 + (-2) = -7\)
- \(-7\) lies within the range \([-8, +7]\)
✔ No overflow.

Case 2: \(R_1 = 1100,\ R_2 = 1010\)
- \(1100 = -4\), \(1010 = -6\)
- Sum: \(-4 + (-6) = -10\)
- \(-10\) is outside the 4-bit range
✔ Overflow occurs.

Case 3: \(R_1 = 0011,\ R_2 = 0100\)
- \(0011 = +3\), \(0100 = +4\)
- Sum: \(3 + 4 = 7\)
- \(7\) is within range
✔ No overflow.

Case 4: \(R_1 = 1001,\ R_2 = 1111\)
- \(1001 = -7\), \(1111 = -1\)
- Sum: \(-7 + (-1) = -8\)
- \(-8\) is the minimum representable value
✔ No overflow.

Thus, overflow occurs only in the second case. This corresponds to Option (A) as per the given choices.

Final Answer: (A)
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