Question

In a DPSK system the input bit sequence is 1101, initial phase = 0. The transmitted phase sequence is:

• A. \( 180^\circ, 0^\circ, 0^\circ, 180^\circ \)
• B. \( 0^\circ, 180^\circ, 180^\circ, 0^\circ \)
• C. \( 180^\circ, 180^\circ, 0^\circ, 0^\circ \)
• D. \( 180^\circ, 0^\circ, 0^\circ, 180^\circ \)

Hint:

In DPSK, remember the simple rule-of-thumb: An input bit of '1' introduces a \(180^\circ\) inversion transition from the immediate preceding phase state, while '0' leaves the current carrier phase unaltered.

Answer 1

The Correct Option is A

Understanding the Concept: In Differential Phase Shift Keying (DPSK), the input binary sequence \( b_k \) is first differentially encoded into a sequence \( d_k \). The encoding convention typically used is: \[ d_k = b_k \oplus d_{k-1} \] where \(\oplus\) represents the Exclusive-OR (XOR) operation. Alternatively, some systems employ a complementary logic convention where: \[ d_k = \overline{b_k \oplus d_{k-1}} \] Let us look closely at standard DPSK modulation where the phase shift between consecutive intervals conveys the information. For a logic '1', a phase change of \(180^\circ\) relative to the previous bit is transmitted, whereas for a logic '0', a phase change of \(0^\circ\) is maintained (or vice versa, depending on configuration rules). Looking at the option set provided, let's analyze the transitions matching the correct answer choice.

Step 1: Perform Differential Encoding
Let the initial reference bit be \( d_0 \). Given that the initial phase is \( 0 \), this directly corresponds to a reference code bit value of \( d_0 = 1 \) or phase \( 0^\circ \). Let the input bit sequence be \( b_k = \{1, 1, 0, 1\} \) for \( k = 1, 2, 3, 4 \). Using the complementary formulation or analyzing the phase rule directly:
• For the 1st input bit \( b_1 = 1 \): There is a phase switch. If initial phase is \(0^\circ\), the first transmitted phase becomes \(180^\circ\).
• For the 2nd input bit \( b_2 = 1 \): Another phase switch relative to the previous state occurs. Changing from \(180^\circ\) by another \(180^\circ\) returns it to \(0^\circ\).
• For the 3rd input bit \( b_3 = 0 \): No phase change relative to the previous state. The phase is maintained at \(0^\circ\).
• For the 4th input bit \( b_4 = 1 \): A phase switch happens again. Changing from \(0^\circ\) by \(180^\circ\) results in \(180^\circ\).

Step 2: Consolidate the Output Sequence
The consecutive transmitted phases computed stage by stage are: \[ \phi_1 = 180^\circ \] \[ \phi_2 = 0^\circ \] \[ \phi_3 = 0^\circ \] \[ \phi_4 = 180^\circ \] This leads to the final sequential phase matrix arrangement of \( \{180^\circ, 0^\circ, 0^\circ, 180^\circ\} \). This precisely matches Option (A).