Step 1: Fixed input states.
The circuit receives predetermined 0 and 1 signals.
Step 2: First-level gates.
AND gate: 0·1 = 0; OR gate: 0+1 = 1.
Step 3: Intermediate OR gate.
Combines previous outputs to give 1.
Step 4: Final output gates.
Top OR: Z = 1; bottom AND: Y = 1.
Step 5: Logic consistency.
All intermediate paths confirm the outputs.
Step 6: Conclusion.
Y = 1, Z = 1.