Consider the digital circuit shown below with two input lines A and B, two select
lines S0 and S1, and an output line Y. The blocks Q and M represent active high
2:4 decoder and 4-to-1 multiplexer, respectively. Out of 16 possible input
combinations, the number of combinations that produce Y=1 is ____________.
(answer in integer)
Note: One input combination is an instance of [A B S1 S0].

An alternative way to solve this is to build the full 4-variable truth table for \(A, B, S_1, S_0\) and evaluate \(Y\) from the decoder-to-multiplexer wiring shown in the figure, counting data-line-wise instead of row-by-row.
The 2:4 decoder produces a one-hot output based on \((A,B)\): \(D_0\) for \(00\), \(D_1\) for \(01\), \(D_2\) for \(10\), \(D_3\) for \(11\). From the diagram, the multiplexer data lines are tied as \(I_0=D_0\), \(I_1=D_1+D_2\), \(I_2=D_2+D_3\), \(I_3=D_3\), and \(Y=I_{S_1S_0}\).
Step 1: List the 4 values of \((A,B)\) against the decoder line each one activates.
| AB = 00 | D0 active |
| AB = 01 | D1 active |
| AB = 10 | D2 active |
| AB = 11 | D3 active |
Step 2: For each of the 4 values of \((S_1,S_0)\), find how many \((A,B)\) rows make \(Y=1\).
\(S_1S_0=00\) selects \(I_0=D_0\): only \(AB=00\) works, giving 1 row.
\(S_1S_0=01\) selects \(I_1=D_1+D_2\): both \(AB=01\) and \(AB=10\) work, giving 2 rows.
\(S_1S_0=10\) selects \(I_2=D_2+D_3\): both \(AB=10\) and \(AB=11\) work, giving 2 rows.
\(S_1S_0=11\) selects \(I_3=D_3\): only \(AB=11\) works, giving 1 row.
Step 3: Sum the rows across the full \(4\times4=16\)-row table: \(1+2+2+1=6\) rows have \(Y=1\).
This route, which counts how many address combinations activate each multiplexer input rather than checking each of the 16 combinations one by one, again confirms that \(Y=1\) for exactly 6 out of 16 combinations.