A synchronous 3-bit binary counter is currently in state \(\text{Q}_2\text{Q}_1\text{Q}_0=101\). After two clock pulses, its state will be
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Unless a question specifies that a counter is a "down-counter" or lists explicit non-standard state logic equations, always assume a counter counts upward sequentially in binary.
Just convert to decimal, add the clock pulses, and convert back:
\[ 5 + 2 = 7 \rightarrow 111 \]
This takes just a few seconds on a test!