Question:medium

A 4 KB byte-addressable memory is built using four 1 KB memory blocks. IA4 and IA3 feed a decoder that drives the active-high CS of the four blocks; the remaining ten address lines (all except IA4, IA3) go to the Addr inputs of each block. For each block, let \(X_1,X_2,X_3,X_4\) be the input memory address (IA11–IA0), in decimal, of its starting location (Addr \(=0\)). Which option is correct? 

Show Hint

When a subset of address lines drives the decoder for chip-select, the block base addresses differ only in those lines. With Addr \(=0\) inside each block, set the decoder-input bits to the block’s select code and zero all other address bits to read the global base address.
Updated On: Feb 3, 2026
  • \((0,1,2,3)\)
  • \((0,1024,2048,3072)\)
  • \((0,8,16,24)\)
  • \((0,0,0,0)\)
Show Solution

The Correct Option is C

Solution and Explanation

To solve this problem, let's analyze the memory configuration and addressing scheme given in the system:

The memory system is organized using four 1 KB blocks, which together form a 4 KB memory system. The address lines IA4 and IA3 are used to select one of these four memory blocks via a 2-to-4 line decoder.

Here's the breakdown of how each component works and helps address the memory blocks:

  1. The address bus has 12 lines (IA11-IA0), as shown in the diagram. The lower 10 lines (IA9-IA0) are connected directly to the address inputs of each 1 KB memory block.

  2. Each 1 KB block needs 10 address lines since \(2^{10} = 1024\) (1 KB = 1024 bytes).

  3. The lines IA4 and IA3 are used by the decoder to provide the chip select (CS) signals to these blocks. This decoder outputs four lines \(Q0, Q1, Q2,\) and \(Q3\), each corresponding to a memory block for chip selection.

Let's determine the starting address (Addr = 0) for each block:

  1. Block 1 (\(X_1\)): When IA3 = 0, IA4 = 0, the decoder output is \(Q0.\) The starting address: 000000000000 in binary is 0 (X1 = 0).

  2. Block 2 (\(X_2\)): When IA3 = 1, IA4 = 0, the decoder output is \(Q1.\) The starting address in decimal: \(2048/256 = 8.\)

  3. Block 3 (\(X_3\)): When IA3 = 0, IA4 = 1, the decoder output is \(Q2.\) The starting address in decimal is 16.

  4. Block 4 (\(X_4\)): When IA3 = 1, IA4 = 1, the decoder output is \(Q3.\) The starting address in decimal is 24.

Thus, the respective starting addresses for each block are \(0, 8, 16, \) and \(24\).

Conclusion: The correct answer is \((0, 8, 16, 24)\).

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