A 4-bit weighted-resistor DAC with inputs \( b_3, b_2, b_1, \) and \( b_0 \) (MSB to LSB) is designed using an ideal opamp, as shown below. The switches are closed when the corresponding input bits are logic ‘1’ and open otherwise. When the input \( b_3b_2b_1b_0 \) changes from 1110 to 1101, the magnitude of the change in the output voltage \( V_o \) (in mV, rounded off to the nearest integer) is _________. 
Step 1: DAC Output Formula
The output voltage for a weighted-resistor DAC is: \[ V_O = -V_{{REF}} \left( \frac{b_3}{1} + \frac{b_2}{2} + \frac{b_1}{4} + \frac{b_0}{8} \right) \] {Step 2: Calculate \( V_O \) for tt{1110}}
For input tt{1110} (\( b_3b_2b_1b_0 \)): \[ V_O = -2 \left( 1 + \frac{1}{2} + \frac{1}{4} + \frac{0}{8} \right) = -2 \times 1.75 = -3.5 \, {V} \] Step 3: Calculate \( V_O \) for tt{1101}}
For input tt{1101}: \[ V_O = -2 \left( 1 + \frac{1}{2} + \frac{0}{4} + \frac{1}{8} \right) = -2 \times 1.625 = -3.25 \, {V} \] Step 4: Compute Change in \( V_O \)} \[ \Delta V_O = | -3.25 - (-3.5) | = 0.25 \, {V} = \boxed{250} \, {mV} \]
A 4-bit weighted-resistor DAC with inputs \( b_3, b_2, b_1, \) and \( b_0 \) (MSB to LSB) is designed using an ideal opamp, as shown below. The switches are closed when the corresponding input bits are logic ‘1’ and open otherwise. When the input \( b_3b_2b_1b_0 \) changes from 1110 to 1101, the magnitude of the change in the output voltage \( V_o \) (in mV, rounded off to the nearest integer) is _________.

Let \( G(s) = \frac{1}{10s^2} \) be the transfer function of a second-order system. A controller \( M(s) \) is connected to the system \( G(s) \) in the configuration shown below.
Consider the following statements.
Which one of the following options is correct?
