Consider a system with a processor and a \(4\) KB direct mapped cache with block size of \(16\) bytes. The system has a \(16\) MB physical memory. Four words \(P\), \(Q\), \(R\), and \(S\) are accessed by the processor in the same order \(10\) times. That is, there are a total of \(40\) memory references in the sequence \(P, Q, R, S, P, Q, R, S,\ldots\)
Assume that the cache memory is initially empty. The physical addresses of the words are given below (\(1\) word \(=1\) byte).
\(P: 0x845B32,\ Q: 0x845B26,\ R: 0x845B36,\ S: 0x846B32\)
Which of the following statements is/are true?
Note: \(1K=2^{10}\) and \(1M=2^{20}\)