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List of top Data Science A.I Cyber Security and Computer Sci. Questions on Digital Logic asked in CUET (PG)
Match List - I with List - II.
List - I
List - II
A.
\(x(x' + y)\)
I.
\(xy + x'z\)
B.
\(x'y'z + x'yz + xy'\)
II.
\((x + y)(x' + z)\)
C.
\(xy + x'z + yz\)
III.
\(xy\)
D.
\((x + y)(x' + z)(y + z)\)
IV.
\(x'z + xy'\)
Choose the correct answer from the options given below:
CUET (PG) - 2026
CUET (PG)
Data Science A.I Cyber Security and Computer Sci.
Digital Logic
Consider following numbers :
A. $(1101.01)_{2} = (13.25)_{10}$
B. $(13.28)_{10} = (1101.011)_{2}$
C. $(2\text{A})_{16} = (42)_{10}$
D. $(37)_{8} = (11010)_{2}$
Choose the correct answer from the options given below :
CUET (PG) - 2026
CUET (PG)
Data Science A.I Cyber Security and Computer Sci.
Digital Logic
Consider the number of symbols in data representation in increasing order :
A. Binary
B. Hexadecimal
C. Octal
D. Penta (radix 5)
Choose the correct answer from the options given below :
CUET (PG) - 2026
CUET (PG)
Data Science A.I Cyber Security and Computer Sci.
Digital Logic
Given below are two statements :
one is labelled as
Assertion (A) and the other is labelled as
Reason (R).
Assertion (A) :
In a ripple carry adder, carry propagation delay increases linearly with the number of bits.
Reason (R) :
Each bit addition must wait for the carry output from the previous stage.
In the light of the above statements, choose the most appropriate answer from the options given below :
CUET (PG) - 2026
CUET (PG)
Data Science A.I Cyber Security and Computer Sci.
Digital Logic
Given below are two statements :
one is labelled as
Assertion (A) and the other is labelled as
Reason (R).
Assertion (A) :
In a synchronous counter, all flip flops toggle simultaneously.
Reason (R) :
All flip flops share the same clock signal.
In the light of the above statements, choose the most appropriate answer from the options given below :
CUET (PG) - 2026
CUET (PG)
Data Science A.I Cyber Security and Computer Sci.
Digital Logic
Which of the following is a universal gate ?
CUET (PG) - 2026
CUET (PG)
Data Science A.I Cyber Security and Computer Sci.
Digital Logic
Which of the following boolean expression is related to De-Morgan theorem ?
CUET (PG) - 2026
CUET (PG)
Data Science A.I Cyber Security and Computer Sci.
Digital Logic
What is meant by factoring?
CUET (PG) - 2024
CUET (PG)
Data Science A.I Cyber Security and Computer Sci.
Digital Logic
The simultaneous equations on the Boolean variables x, y, z, and w are: x + y + z = 1, xy = 0, x + y + w = 1, xy + z = 0. The solution for x, y, z, and w, respectively, is:
CUET (PG) - 2024
CUET (PG)
Data Science A.I Cyber Security and Computer Sci.
Digital Logic
Which of the following statements are not true?
CUET (PG) - 2024
CUET (PG)
Data Science A.I Cyber Security and Computer Sci.
Digital Logic
An FPGA with an embedded logic function that cannot be programmed is said to be:
CUET (PG) - 2024
CUET (PG)
Data Science A.I Cyber Security and Computer Sci.
Digital Logic
A pulse is applied to each input of a 2-input NAND gate. One pulse goes high at t=0 and goes back low at t=1ms. The other pulse goes high at t=0 and goes back low at t=3ms. The output pulse can be described as follows:
CUET (PG) - 2024
CUET (PG)
Data Science A.I Cyber Security and Computer Sci.
Digital Logic
Add the following hexadecimal numbers:
\(DF_{16} + AC_{16}\)
CUET (PG) - 2024
CUET (PG)
Data Science A.I Cyber Security and Computer Sci.
Digital Logic